Design and Analysis of VLSI Subsystems

By Prof. Madhav Rao | IIIT Bangalore

Learners enrolled: 4566 | Exam registration: 702

About the Course:

The course will introduce students to the topics of Digital CMOS VLSI subsystem design using design metrics of delay, power, and area in detail. The course focuses more on power estimation, and interconnect aware designs and discusses on few power benefits designs. Approximate computing datapath subsystem designs will be analyzed along with the design, and error metrics. Different forms of standard cell design of latch, and flipflops will be discussed and the importance of timing parameters in sequential circuits will explained.

INTENDED AUDIENCE: Students interested in Digital VLSI

PREREQUISITES: Digital Electronics at Undergraduate level.

INDUSTRY SUPPORT: Samsung, Intel, Broadcom, Qualcomm, IBM

Summary

Course Status :	Completed
Course Type :	Elective
Language for course content :	English
Duration :	12 weeks
Category :	Electrical, Electronics and Communications Engineering VLSI design
Credit Points :	3
Level :	Undergraduate/Postgraduate
Start Date :	22 Jan 2024
End Date :	12 Apr 2024
Enrollment Ends :	05 Feb 2024
Exam Registration Ends :	16 Feb 2024
Exam Date :	21 Apr 2024 IST

Note: This exam date is subject to change based on seat availability. You can check final exam date on your hall ticket.

Page Visits

Course layout

Week 1: CMOS Transistors and Current model

Week 2: CMOS Inverter and characteristics

Week 3: Noise Margin and Delay of Inverter

Week 4: RC Delay

Week 5: Delay optimization

Week 6: Combinatorial Circuit Family

Week 7: Stick Diagram & Interconnects

Week 8: Interconnects (Contd)

Week 9: Power

Week 10: Static Power, and CMOS Latch and flipflop design

Week 11: Static Timing Analysis

Week 12: Adder subsystem design, and Approximate Computing

Books and references

1.N. Weste and D. Harris, CMOS VLSI Design A Circuits and Systems Perspective, 4th edition, Pearson.

2.J M Rabaey, A. Chandrakasan, B. Nikolic, Digital Integrated Circuits A Design Perspective.

Instructor bio

Prof. Madhav Rao

IIIT Bangalore

Prof.Madhav Rao is an Associate Professor at IIIT-Bangalore. He teaches Digital VLSI Design, VLSI subsystem, Electronic devices and circuits, and basic electronics courses to IIIT-B students. He is a recipient of SERB Early Career Research Award (2014-2017), Visvesvaraya Young Faculty fellowship award (2016-2020), IBM Shared University Research Award (2018-20), 2021 IBM Global University Program Academic Award. He has also completed projects sponsored by MEITY in the past, and is currently involved in the project from MSJE, and GoK, IT-BT center.

Course certificate

The course is free to enroll and learn from. But if you want a certificate, you have to register and write the proctored exam conducted by us in person at any of the designated exam centres.
The exam is optional for a fee of Rs 1000/- (Rupees one thousand only).
Date and Time of Exams: 21 April 2024 Morning session 9am to 12 noon; Afternoon Session 2pm to 5pm.
Registration url: Announcements will be made when the registration form is open for registrations.
The online registration form has to be filled and the certification exam fee needs to be paid. More details will be made available when the exam registration form is published. If there are any changes, it will be mentioned then.
Please check the form for more details on the cities where the exams will be held, the conditions you agree to when you fill the form etc.

CRITERIA TO GET A CERTIFICATE

Average assignment score = 25% of average of best 8 assignments out of the total 12 assignments given in the course.
Exam score = 75% of the proctored certification exam score out of 100

Final score = Average assignment score + Exam score

YOU WILL BE ELIGIBLE FOR A CERTIFICATE ONLY IF AVERAGE ASSIGNMENT SCORE >=10/25 AND EXAM SCORE >= 30/75. If one of the 2 criteria is not met, you will not get the certificate even if the Final score >= 40/100.

Certificate will have your name, photograph and the score in the final exam with the breakup.It will have the logos of NPTEL and IIIT Bangalore .It will be e-verifiable at nptel.ac.in/noc.

Only the e-certificate will be made available. Hard copies will not be dispatched.

Once again, thanks for your interest in our online courses and certification. Happy learning.

- NPTEL team

SWAYAM Helpline / Support