VLSI Signal Processing

By Prof. Mrityunjoy Chakraborty   |   IIT Kharagpur
Learners enrolled: 421
Digital signal processing (DSP) has emerged over last two decades as the single most key component in all electronic applications, e.g., multimedia and mobile communications, video compression, digital still and network cameras, mobile phones, radar imaging, acoustic beamformers, GPS, biomedical signal processing etc. Most of these applications impose several challenges in the implementation of DSP systems, like capability to process high throughput data as demanded by the real time application, as well as requiring less power and less chip area.This course aims at providing a comprehensive coverage of some of the important techniques for designing efficient VLSI architectures for DSP. Towards this, architectural optimization at various levels will be considered. The course assumes minimal prerequisites - an undergraduate level knowledge of digital circuit design and elementary DSP operations is sufficient for one to be able to attend the course. Apart from regular students, participants from academia may thus find the course to be useful to develop similar courses at their respective institutions. Alternatively, the course may also be used as a reference by industrial professionals interested in VLSI design of signal processing and communication systems. 

INTENDED AUDIENCE  : Electrical Engg., Electronics and Communication Engg., Instrumentation Engg., Information technology and Computer Science students
: ST Microelectronics Ltd, Texas Instruments, Ittiam Systems
Course Status : Upcoming
Course Type : Elective
Duration : 8 weeks
Start Date : 21 Feb 2022
End Date : 15 Apr 2022
Exam Date : 24 Apr 2022 IST
Category :
  • Electrical, Electronics and Communications Engineering
Credit Points : 2
Level : Undergraduate/Postgraduate

Course layout

Week 1 :Graphical representation of DSP algorithms, signal flow graph (SFG), data flow graph (DFG) and dependence graph (DG), high level transformation, critical path.
Week 2 :Retiming of DFG, critical path minimization by retiming, loop retiming and iteration bound
Week 3 :Cutset retiming, design of pipelined DSP architectures, examples
Week 4 :Parallel realization of DSP algorithms, idea of unfolding, unfolding theorem, loop unfolding
Week 5 :Polyphase decomposition of transfer functions, hardware efficient parallel realization of FIR filters, 2-parallel and 3-parallel filter architectures.
Week 6 :Hardware minimization by folding, folding formula, examples from biquad digital filters,
Week 7 :Delay optimization by folding, lifetime analysis, forward-backward data allocation, examples from digital filters
Week 8 :Pipelining digital filters, look ahead techniques, clustered and scattered look ahead, combining parallel processing with pipelining in digital filters

Books and references

1.``VLSI Digital Signal Processing Syustems”, Keshab K. Parhi, Wiley Eastern
2.``Digital Signal Processing for Multimedia Systems”, Keshab K. Parhi and Takao Nishitani, Marcel Dekker.
3.``Pipelined Lattice and Wave Digital Recursive Filters”, J. G. Chung and Keshab K. Parhi, Kluwer.

Instructor bio

Prof. Mrityunjoy Chakraborty

IIT Kharagpur
Prof. Mrityunjoy Chakraborty obtained Bachelor of Engg. from Jadavpur university, Calcutta, Master of Technology from IIT, Kanpur and Ph.D. from IIT, Delhi. He joined IIT, Kharagpur as a faculty member in 1994, where he currently holds the position of a professor in Electronics and Electrical Communication Engg. The teaching and research interests of Prof. Chakraborty are in Digital and Adaptive Signal Processing, VLSI Signal Processing, Linear Algebra and Compressive Sensing. In these areas, Prof. Chakraborty has supervised several graduate theses, carried out independent research and has several well cited publications. Prof. Chakraborty is currently a senior editorial board member of the IEEE Signal Processing Magazine and also of the IEEE journal of Emerging Techniques in Circuits and Systems. Earlier, he had been an Associate Editor of the IEEE Transactions on Circuits and Systems, part I (2004-2007, 2010-2012) and part II (2008-2009), apart from being an elected member (also currently the chair) of the DSP Technical Committee (TC) of the IEEE Circuits and Systems Society, a guest editor of the EURASIP JASP (special issue), track co-chair (DSP track) of ISCAS 2015 & 2016, Gabor track chair of DSP-15, and a TPC member of ISCAS (2011-2014), ICC (2007-2011) and Globecom (2008-2011). Prof. Chakraborty is a co-founder of the Asia Pacific Signal and Information Processing Association (APSIPA), is currently a member of the APSIPA BOG and also, served as the chair of the APSIPA TC on Signal and Information Processing Theory and Methods (SIPTM). He has also been the general chair and also the TPC chair of the National Conference on Communications – 2012. Prof. Chakraborty is a fellow of the National Academy of Science, India (NASI), and also of the Indian National Academy of Engineering (INAE). During 2012-2013, he was selected as a distinguished lecturer of the APSIPA.

Course certificate

The course is free to enroll and learn from. But if you want a certificate, you have to register and write the proctored exam conducted by us in person at any of the designated exam centres.
The exam is optional for a fee of Rs 1000/- (Rupees one thousand only).
Date and Time of Exams: 24 April 2022 Morning session 9am to 12 noon; Afternoon Session 2pm to 5pm.
Registration url: Announcements will be made when the registration form is open for registrations.
The online registration form has to be filled and the certification exam fee needs to be paid. More details will be made available when the exam registration form is published. If there are any changes, it will be mentioned then.
Please check the form for more details on the cities where the exams will be held, the conditions you agree to when you fill the form etc.


Average assignment score = 25% of average of best 6 assignments out of the total 8 assignments given in the course.
Exam score = 75% of the proctored certification exam score out of 100

Final score = Average assignment score + Exam score

YOU WILL BE ELIGIBLE FOR A CERTIFICATE ONLY IF AVERAGE ASSIGNMENT SCORE >=10/25 AND EXAM SCORE >= 30/75. If one of the 2 criteria is not met, you will not get the certificate even if the Final score >= 40/100.

Certificate will have your name, photograph and the score in the final exam with the breakup.It will have the logos of NPTEL and IIT Kharagpur .It will be e-verifiable at nptel.ac.in/noc.

Only the e-certificate will be made available. Hard copies will not be dispatched.

Once again, thanks for your interest in our online courses and certification. Happy learning.

- NPTEL team

MHRD logo Swayam logo


Goto google play store