Multi-Core Computer Architecture - Storage and Interconnects

By Prof. John Jose | IIT Guwahati

Learners enrolled: 1479

We are in the era of multi-core systems where even the simplest of handheld devices like a smart phone houses many processors in a single chip. The core counts are ever increasing from 8 to 10 in smart phones to over 100s in super computers. This course will introduce the students to the world of multi-core computer architectures. With the unprecedented growth of data science, on-chip storage systems and inter-core communication framework are getting equal attention as that of processors. This course will focus on delivering an in-depth exposure in memory-subsystems and interconnects of Tiled Chip Multi-Core Processors with few introductory sessions on advanced superscalar processors. The course concludes with pointers to current research standings and on-going research directions for motivating the students to explore further.

INTENDED AUDIENCE: Anyone in CSE and related fields (like ECE, EEE, IT etc.) with an interest of exploring Multi-Core Computer Architecture
PRE-REQUISITE : Final year undergraduates or above in Computer Science and related fields (like ECE, EEE, IT etc.).
A basic understanding of Computer Organisation & Architecture will be added advantage.
INDUSTRY SUPPORT : Intel, AMD, IBM, HP, Apple, Samsung etc.

Summary

Course Status :	Completed
Course Type :	Elective
Language for course content :	English
Duration :	8 weeks
Category :	Computer Science and Engineering
Credit Points :	2
Level :	Undergraduate/Postgraduate
Start Date :	24 Feb 2020
End Date :	17 Apr 2020
Enrollment Ends :	24 Feb 2020
Exam Date :	25 Apr 2020 IST

Note: This exam date is subject to change based on seat availability. You can check final exam date on your hall ticket.

Page Visits

Course layout

Week 1  : Fundamentals of instruction pipeline for superscalar processor design
Week 2  : Memory hierarchy design, cache memory - fundamentals and basic optimisations
Week 3  : Cache memory – advanced optimisations, performance improvement technqiues
Week 4  : gem5 simulator – build and run, address translations using TLB and page table
Week 5  : DRAM – organisation, access techniques, scheduling algorithms and signal systems.
Week 6  : Introduction – Tiled Chip Multicore Processors (TCMP), Network on Chips (NoC)
Week 7  : NoC router – architecture, design, routing algorithms and flow control techniques.
Week 8  : Advanced topics in NoC and storage – compression, prefetching, QoS.

Books and references

1. Computer Architecture - A Quantitative Approach-5e John L. Hennessy, David A. Patterson Morgan Kaufman.
2. Memory System - Cache, DRAM and Disk Bruce Jacob, Spencer W. Ng, David T. Wang Morgan Kaufman.
3. Principles and Practices of Interconnection Networks William J. Dally, Brian P. Towles Elsevier.

Instructor bio

Prof. John Jose

IIT Guwahati

Dr. John Jose is an Assistant Professor in the Department of Computer Science & Engineering, Indian Institute of Technology, Guwahati, Assam since 2015. He completed his Ph.D degree in Department of Computer Science & Engineering, Indian Institute of Technology Madras in the field of computer architecture. He did his B.Tech degree from College of Engineering Adoor, Cochin University, Kerala. He was a rank holder in M.Tech degree from the Vellore Institute of Technology. He had guided over 8 M.Tech thesis and is currently supervising 7 Ph.D thesis and 2 M.Tech thesis. His area of interests is in on-chip interconnection networks, cache management techniques for multicore architectures, non-volatile memory techniques, disaggregated memory systems, fault tolerant and secure NoC designs for large multicore systems. He is the Principal Investigator for SERB-ECRA and MHRD-SPARC projects. He is having active research collaboration with the University of Catania-Italy, University of Essex, UK, University of Florida, USA, and Federal University Naples, Italy. During his doctoral studies in CSE department, IIT Madras he has received the outstanding teaching assistant award for eight consecutive semesters. He is a reviewer for many national and international peer-reviewed journals and members of technical program committee for many IEEE/ACM national and international conferences. He has given many technical presentations in various international conferences held at Brazil, UAE, Singapore, France, Italy, South Korea and USA in the fields of computer design, interconnection networks, and design automation. He has many international IEEE & ACM conference publications and few ACM & IEEE transactions journal papers to his credit. He is the recipient of ACM-SIGDA, IEEE-CEDA, IARCS and DRDO research grants for research presentations held in various international venues. He is the IIT Guwahati coordinator for Ishan Vikas program and Vigyan Jyoti program of MHRD, Govt. of India and course coordinator for MHRD sponsored GIAN course in on-chip interconnects. He has offered two NPTEL Online Certification courses in the area of Computer Architecture. He is a resource person to computer architecture related symposia, workshops and short term courses in many technical institutes all over India. He is a resource person for many career guidance seminars/ teaching pedagogy workshops to various technical institutes and schools. He is a motivational speaker for many companies, school , and higher education institutions. He is an active member of professional societies like ACM, IEEE, ISTE and CSI.

Course certificate

• The course is free to enroll and learn from. But if you want a certificate, you have to register and write the proctored exam conducted by us in person at any of the designated exam centres.• The exam is optional for a fee of Rs 1000/- (Rupees one thousand only).

• Date and Time of Exams: 25th April 2020, Morning session 9am to 12 noon; Afternoon Session 2pm to 5pm.

• Registration url: Announcements will be made when the registration form is open for registrations.

• The online registration form has to be filled and the certification exam fee needs to be paid. More details will be made available when the exam registration form is published. If there are any changes, it will be mentioned then.

• Please check the form for more details on the cities where the exams will be held, the conditions you agree to when you fill the form etc.

CRITERIA TO GET A CERTIFICATE:

• Average assignment score = 25% of average of best 6 assignments out of the total 8 assignments given in the course.

• Exam score = 75% of the proctored certification exam score out of 100

• Final score = Average assignment score + Exam score

YOU WILL BE ELIGIBLE FOR A CERTIFICATE ONLY IF AVERAGE ASSIGNMENT SCORE >=10/25 AND EXAM SCORE >= 30/75.

• If one of the 2 criteria is not met, you will not get the certificate even if the Final score >= 40/100.

• Certificate will have your name, photograph and the score in the final exam with the breakup.It will have the logos of NPTEL and IIT Guwahati. It will be e-verifiable at nptel.ac.in/noc.

• Only the e-certificate will be made available. Hard copies will not be dispatched.