About the course
This course on Embedded systems will first the students to the fundamental requirements of embedded systems and the interaction between hardware and software in such systems. Next the course will discuss some basic steps of hardware design, introduce the students to ASIPs, ASICs and FPGAs. Next, the students will be exposed to the very important issue of designing for less power consumption and introduce them to the techniques that are adopted to this end. Since many of the embedded systems will have real time constraints, basic issues of real time operating systems will be discussed. This will be followed by formal specification models and languages, mapping the specification to hardware and software components along with decisions on design tradeoffs and hardware software partitioning. Next, synthesis if hardware and software along with a few of the optimization techniques will be presented. The course will end with a brief overview of design verification methods that are adopted for embedded system design.
Computer Organization, Basic of Microprocessors
Industries that will recognize this course
Any industry working in the area of Embedded Systems
Anupam Basu is Professor in the Dept. of Computer Science & Engineering, IIT Kharagpur, and has been an active researcher in the areas of Cognitive and Intelligent Systems, Embedded Systems and Language Processing, Presently he is acting as the Chairman and Head of the Center for Educational Technology, IIT Kharagpur. He has developed several embedded system based tools empowering the physically challenged and has led several national projects in the area.
He has taught at the University of California, Irvine at the Center for Embedded Systems. He is an Alexander von Humboldt Fellow and a Fellow of the Indian National Academy of Engineering. The awards won by him include the State Award for the Best Contribution to the Cause of Empowerment of the Disabled (2014), Universal Design Award 2011, for contributions in design for the disabled, by National Council for Promotion of Employment of Disabled Persons, India, the National Award for the Best Technology Innovation for the Physically Disabled (2007) and the Da-Vinci Award 2004 from the Engineering Society of Detroit.
Week 1: Introduction to Embedded System, ASICs and ASIPs
Week 2: Designing Single Purpose Processors and Optimization
Week 3: Introduction to FPGAs and Synthesis
Week 4: Verilog Hardware Description Language (Verilog HDL)
Week 5: Microcontrollers and Power Aware Embedded System Design
Week 6: Real Time Operating System
Week 7: Real Time Scheduling Algorithms
Week 8: Modelling and Specification
Week 9: Design Synthesis
Week 10: Digital Camera Design and Hardware Software Partitioning
Week 11: Design Optimization
Week 12: Simulation and Verification
• The exam is optional for a fee. Exams will be on 23 April 2017.
• Time: Shift 1: 9am-12 noon; Shift 2: 2pm-5pm
• Any one shift can be chosen to write the exam for a course.
• Registration url: Announcements will be made when the registration form is open for registrations.
• The online registration form has
to be filled and the certification exam fee needs to be paid. More details will
be made available when the exam registration form is published.
• Final score will be calculated as : 25% assignment score + 75% final exam score.
• 25% assignment score is calculated as 25% of average of 12 weeks course: Best 8 out of 12 assignments.• E-Certificate will be given to those who register and write the exam and score greater than or equal to 40% final score. Certificate will have your name, photograph and the score in the final exam with the breakup. It will have the logos of NPTEL and IIT KHARAGPUR. It will be e-verifiable at nptel.ac.in/noc